Cache is actually a small-capacity local memory set up in order to regard the large-capacity internal memory composed of DRAM as a high-speed memory, and is generally composed of high-speed SRAM. This kind of local memory is CPU-oriented, and it is introduced to reduce or eliminate the impact of the speed difference between CPU and memory on system performance.
Cache usually stores a copy (copy) of part of the content in the internal memory. The copy of the content is the data and program codes that have been used by the CPU recently. The effectiveness of Cache is to take advantage of the local locality of the program's access to the memory in time and space, that is, for most programs, a specific area will be intensively and repeatedly accessed within a certain time slice. For example, the operations of PUSH/POP instructions are executed sequentially on the top of the stack, variables will be reused, and subroutines will be called repeatedly, etc., which are practical examples of this local culture. Therefore, if for a specific time slice, replace the low-speed and large-capacity internal memory with the Cache connected to the local bus, as the area where the CPU concentrates and repeatedly access, the performance of the system will be significantly improved.
When the system is powered on or reset, there is nothing in the cache. When the CPU sends out a set of addresses to access the internal memory, the content of the accessed memory is "copied" to the Cache at the same time. After that, whenever the CPU accesses the memory, the Cache controller must check the address sent by the CPU to determine whether the address unit to be accessed by the CPU is in the Cache. If it is, it is called a Cache hit, and the CPU can read/write it at a very fast speed; if it is not, it is called a Cache miss. At this time, it needs to be accessed from the memory and placed adjacent to the current access. Copy the contents of the storage area to the Cache. When a miss occurs, memory access may require more waiting cycles than access to memory without Cache, which will reduce the efficiency of the system. The call and jump instructions in the program will cause non-regional operations, which will reduce the mission rate. Therefore, improving the hit rate is the main goal of Cache design.
The speed of the CPU is much higher than that of the memory. When the CPU directly accesses data from the memory, it has to wait for a certain period of time. Cache can save a part of the data that the CPU has just used or recycled. If the CPU needs to use this part of the data again, it can Call directly from the Cache, which avoids repeated access to data, reduces the waiting time of the CPU, and thus improves the efficiency of the system.
Register: The basic unit in the cpu is at the same level as the arithmetic unit in the cpu. Data storage directly processed by the arithmetic unit. There are registers in all CPUs from ordinary single-chip microcomputers to intel.
Cache: Generally, ordinary MCUs do not have caches. Some powerful personal computers or mobile phone chips have caches. The caches generally use SRAM static random access memory, which is very fast. It is usually the case that the used data read from the memory is put into the cache when the computer is working, so that it can be found quickly when it is used next time. However, the cpu generally does not directly access the cache, but first puts the cache into the register, and then operates.
Memory: Generally, ordinary MCUs have no memory, and the memory is generally external, and the cache and registers are usually integrated inside the cpu. The memory generally uses DRAM dynamic random access memory, which is slower. The working cpu will first go to the cache to find the data it wants, if not, it will go to the memory to read it.
The arithmetic units, controllers, registers, and cache are all encapsulated inside the CPU. The CPU as a whole fetches data from the memory, and the data in the memory comes from the external memory.
On the whole, cache is a bridge between CPU and memory, used to balance the speed difference between high-speed devices (CPU) and low-speed devices (memory).
Speed from fast to slow: register>cache>memory>external storage
Unit price per storage unit from high to low: register>cache>memory>external storage
Storage capacity from high to low: external storage>memory>cache>register
In this article, we will discuss about server-side caching technologies, especially Redis, and show you how we can deploy a Redis caching server on Alibaba Cloud.
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