All Products
Search
Document Center

Elastic Compute Service:View and modify CPU topologies

Last Updated:Jan 08, 2024

You can view and modify the CPU topologies of Elastic Compute Service (ECS) instances based on your business requirements to improve performance and parallelism and optimize resource allocation in various scenarios such as virtualization environments, multi-threaded programming, and high-performance computing (HPC). This topic describes how to call API operations to view and modify the CPU topologies of instances.

Background information

CPU topology

CPU topology refers to the manner in which physical cores and logical cores are connected in a multi-core processor. In most cases, each physical core contains one or more logical cores. The physical cores are interconnected by buses or an interconnect network. The performance and energy efficiency of multi-core processors vary based on the CPU topology.

Specific Alibaba Cloud instance families currently support two types of CPU topologies: Hyper-Threading (HT) continuous (ContinuousCoreToHTMapping) CPU topology and HT discrete (DiscreteCoreToHTMapping) CPU topology. When you create an instance, you can call API operations and configure parameters to modify CPU topologies.

Note

In this example, an x86 instance with eight vCPUs is used. The following figures show the two types of CPU topologies.

CPU topology refers to the manner in which physical cores and logical cores are connected in a multi-core processor. In most cases, each physical core contains one or more logical cores. The physical cores are connected directly by buses or an interconnect network. The performance and energy efficiency of multi-core processors vary based on the CPU topology.

The following figures show the two types of CPU topologies.

HT continuous CPU topology

image.png

Relationships between the logical cores and physical cores:

  • HT 0 and HT 1 belong to CORE 0.

  • HT 2 and HT 3 belong to CORE 1.

  • HT 4 and HT 5 belong to CORE 2.

  • HT 6 and HT 7 belong to CORE 3.

HT discrete CPU topology

image.png

Relationships between the logical cores and physical cores:

  • HT 0 and HT 4 belong to CORE 0.

  • HT 1 and HT 5 belong to CORE 1.

  • HT 2 and HT 6 belong to CORE 2.

  • HT 3 and HT 7 belong to CORE 3.

Limits

You can modify the CPU topologies of instances only in the following instance families in all regions:

  • ecs.g7, ecs.c7, and ecs.r7

  • ecs.g6, ecs.c6, and ecs.r6

  • ecs.g6e, ecs.c6e, and ecs.r6e

For more information, see Overview of instance families.

View CPU topologies

You can call the DescribeInstances operation with the AdditionalAttributes parameter and check the TopologyType response parameter for the CPU topology type of an instance. For more information, see DescribeInstances.

Valid values of the TopologyType parameter:

  • ContinuousCoreToHTMapping: HT continuous CPU topology

  • DiscreteCoreToHTMapping: HT discrete CPU topology

  • If the return value is empty, the CPU topology cannot be modified.

Modify the CPU topology

Note

Before you call an API operation to modify the CPU topology of an instance, make sure that the instance is in the Stopped state.

You can modify the CPU topology of an instance by calling the API operation and specifying different parameters.

  • Modify the CPU topology during instance creation

    Call the RunInstances operation and set the CpuOptions.TopologyType parameter to modify the CPU topology. For more information, see RunInstances.

  • Modify the CPU topology of an existing instance

    Call the ModifyInstanceAttribute operation and set the CpuOptions.TopologyType parameter to modify the CPU topology of an existing instance. For more information, see ModifyInstanceAttribute.

Valid values of the CpuOptions.TopologyType parameter:

  • ContinuousCoreToHTMapping: HT continuous CPU topology

  • DiscreteCoreToHTMapping: HT discrete CPU topology